This paper presents the design of a vertically-integrated image sensor/processor device, implemented in a fully stacked 3-layer three-dimensional (3D) silicon on insulator (SOI) 150nm CMOS technology.

Abstract: Increasing demand for DRAM scaling and high-bandwidth has driven DRAM technology to 3D/2.5D integration. With the innovative Hybrid Bonding technology, a new Stacked Embedded DRAM (SEDRAM) ...