As CMOS device sizes continue to scale down, radiation-related reliability issues are of ever-growing concern. Single event double node upsets (SEDUs) in sequential logic and single event transients ...

The NAND, NOR, AND and OR logic gate circuits are fabricated by monolithic integrated E/D mode MIS-HEMTs. Then the NOR and NAND based data flip-flop (DFF) structure are realized on the same wafer. For ...