News

TC5100 is a highly flexible LDPC encoder/decoder Core. It can essentially cover all possible quasi-cyclic LDPC codes: WiFi, WiMAX, proprietary codes, and also 3GPP Next Release (5G NR) candidate codes ...
CCSDS LDPC Encoder and Decoder IP Cores The CCSDS 231.0 LDPC Encoder and Decoder IP Core is available immediately in synthesizable Verilog or optimized netlist format, along with synthesis scripts, ...
The LDPC Decoder The LDPC decoder receives blocks of data, including corrupted bits due to noise, with five or six bits resolution of confidence information for each 0 or 1 bit received.
Using a field-programmable gate array (FPGA) testbed from Polaran, the EPIC 100Gbps wireless demo exhibited practical ultra-high throughput FEC solutions for encoder and decoder technology.
Comtech AHA has released its low-density parity check code (LDPC) forward error correction (FEC) encoder/decoder core. It is compliant with the Digital Video Broadcast S2 standard (DVB-S2).