To this end, we present an efficient in-memory convolutional neural network (CNN) accelerator optimized for use with racetrack memory. We design a series of fundamental arithmetic circuits as ...

Recently, hybrid cache architecture has become illuminated. As heterogeneous memory dies are stacked, it improves the performance of microprocessor enhanced in terms of power consumption and ...

Memory test and repair has been generally applied to improve memory yield. However, due to the high cost of automatic test equipment (ATE) equipment, which has been employed for memory test and repair ...