Since VLSI circuits can be naturally modeled by graphs, experiments were conducted by partitioning graphs from various graph families against both simulated and real-world partitioning criteria. A ...

In many practical situations, ranging from network design and data clustering to circuit layout in VLSI, the efficient partitioning of vertices can greatly enhance computational performance and ...

CATALOG DESCRIPTION : Basic concepts in VLSI CAD with emphasis on physical design, fundamental algorithms for CAD problems, development of CAD tools. REQUIRED TEXT: Andrew B. Kahng, Jens Lienig, Igor ...

In this paper we present a parallel formulation of a multilevel k-way graph partitioning algorithm. A key feature of this parallel formulation is that it is able to achieve a high degree of ...

The algorithms are implemented and compared with known partitioning algorithms. Since VLSI circuits can be naturally modeled by graphs, experiments were conducted by partitioning graphs from various ...