This study presents the design and development of a virtual laboratory for the Logic design course. A novel implementation of a BCD to seven-segment decoder is shown, which allows student to connect ...

A 555 timer in astable mode provides a clock source which is fed into a 4510 decade counter, which connects to a 4028 BCD to decimal decoder to drive the LEDs. Finally, a 4011 NAND gate IC is used ...

Abstract: We have experimentally demonstrated a 40Gb/s all-optical binary-coded-decimal (BCD) decoder for the first time, utilizing delay interferometers (DIs) and cascading semiconductor optical ...