News

EDN23y
Verilog-2001 language ready to roll - EDN
NAPA, Calif. — Implementation of the new Verilog-2001 hardware description language became practical with the IEEE's release Wednesday (Oct. 17) of documentation that describes the standard, ...
EDN4y
System Compiler Adds Support for Mixed-Language Simulation with Verilog ...
San Jose, CA – February 20, 2001 – C Level Design, Inc. today announced a fully automated Verilog Programming Language Interface (PLI) and VHDL Foreign Language Interface (FLI) code generators to ...
New Electronics9y
Verilog based language enables design of DNA circuits
Biological engineers at MIT have created a programming language based on Verilog that allows complex DNA encoded circuits to be designed rapidly. These circuits can be used to give new functions to ...
Electronic Design23y
Testbench Automation Tool Provides Tight Links To Verilog Simulation
Faster runtime performance, real-time access to built-in Verilog simulation coverage metrics, ... replaces traditional, slower approaches using the Verilog programming language interface ...
Electronic Design23y
Verilog Simulator Adds Full-Featured Coverage Analysis And A C/C++ ...
The latest VCS Verilog simulator from Synopsys contains built-in comprehensive coverage analysis. With it, design teams using VCS 6.0.1 can determine their verification quality ...