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IEEE2y
Design and Evaluation of a Power-Efficient Approximate Systolic Array Architecture for Matrix Multiplication - IEEE Xplore
Matrix multiplication (MM) is a basic operation for many Digital Signal Processing applications. A Systolic Array (SA) is often considered as one of the most favorable architecture to achieve high ...
IEEE4mon
Design and Evaluation of a Power-Efficient Approximate Systolic Array Architecture for Matrix Multiplication - IEEE Xplore
Matrix multiplication (MM) is a basic operation for many Digital Signal Processing applications. A Systolic Array (SA) is often considered as one of the most favorable architecture to achieve high ...