Formal verification of arithmetic circuits is a rigorous approach that employs mathematical techniques to ascertain the correctness of hardware designs implementing arithmetic operations. This ...

Arithmetic circuits require a verification process to prove that the gate level circuit is functionally equivalent to a high level specification. This paper presents an automatic equivalence checking ...

In transformer-based language models, a circuit is a subset of model components (MLPs and attention heads) that execute specific tasks, such as arithmetic. Researchers analyzed the arithmetic circuits ...